Uniform TitlePerformance and hardware complexity analysis of programmable radio platform for MIMO OFDM based WLAN systems
NameBhatnagar, Vijayant (author), Spasojevic, Predrag (chair), Raychaudhuri, Dipankar (internal member), Gajic, Zoran (internal member), Miljanic, Zoran (outside member), Rutgers University, Graduate School - New Brunswick,
SubjectElectrical and Computer Engineering,
Orthogonal frequency division multiplexing,
DescriptionEmerging wireless technologies and standards present a design space with multiple dimensions in terms of time, physical hardware space, and technology trends. Efficient evaluation of a desired combination of these dimensions to support multiple technologies and standards presents a significant challenge. We study the feasibility of a multiprotocol architecture without sacrificing the Quality of Service. An architecture facilitating such a mechanism can be implemented at different layers in the network stack with each layer offering a tradeoff between complexity and latency. Careful analysis of the physical layer reveals that most blocks of the transceiver can be reused for different protocols without significant architectural change. In addition to the feasibility analysis, we also identify common blocks in the network stack that could be possibly reused buying us significant hardware gains without sacrificing the aggregate system throughput. Our study presents the gate count complexity and the performance analysis of programmable radio architecture with the 802.11n (Draft 3.0) MIMO-OFDM based protocol stream and 802.11a OFDM based WLAN protocol stream. In this thesis, we demonstrate that multiple protocols can be supported using the same hardware under acceptable latency requirements. Complexity of the system in terms of gate count has been determined. It has been found that for shorter frame sizes, it is better to process less number of OFDM symbols at a time. However, for larger frame sizes, it is beneficial to process large number (four to eight) of OFDM symbols at a time. Also, the minimum clock rate required to run the hardware, would vary depending upon the number of OFDM Symbols processed. The switching and multiplexing overhead of the programmable radio platform has also been investigated. Finally, our simulator is capable of evaluating bottlenecks, if any.
NoteIncludes bibliographical references (p. 75-76).
CollectionGraduate School - New Brunswick Electronic Theses and Dissertations
Organization NameRutgers, The State University of New Jersey
RightsThe author owns the copyright to this work.