TitleEndurance characterization and improvement of floating gate semiconductor memory devices
NameKhan, Faraz I. (author), Sheng, Kuang (chair), Lu, Yicheng (internal member), Jiang, Wei (internal member), Rutgers University, Graduate School - New Brunswick,
SubjectElectrical and Computer Engineering,
Semiconductor storage devices,
Flash memories (Computers)
DescriptionLow power consumption, virtually zero latency, extremely fast boot-up for OS and applications, fast data access, portability, and high shock resistance are some of many reasons that make Flash memory devices an ideal choice for a vast variety of consumer electronics. Flash memory is a specific type of non-volatile EEPROM. A typical Flash memory cell looks similar to a MOSFET, except that it has a dual-gate structure. Flash memory cells use the principle of threshold voltage modulation to alter the channel current (Ids) when a reference read voltage (Vread) is applied to the control gate. Different levels of Ids are, in turn, interpreted as unique logic states. Fowler-Nordheim tunneling is used to achieve threshold voltage modulation in NAND Flash memory cells.
Despite its high performance potential, NAND Flash memory suffers from the drawback of limited program/erase endurance. High field/current stress caused by Fowler-Nordheim tunneling (during program/erase cycling) leads to tunnel oxide degradation, which eventually limits the endurance characteristics of NAND Flash memory cells. One of the most significant tunnel oxide degradation mechanisms is charge trapping. This work is devoted to the study of charge trapping and its effects on the endurance characteristics and reliability of NAND Flash memory devices. Cell threshold voltage shift and memory window narrowing, a direct consequence of tunnel oxide degradation caused by charge trapping, are typical failure modes in NAND Flash memory cells.
In this work, endurance characterization of NAND Flash memory devices and a detailed analysis has been conducted reconfirming the issue of limited program/erase endurance. Subsequently, a novel NAND Flash memory cell design has been proposed which eliminates tunnel oxide degradation caused by Fowler-Nordheim tunneling. Device simulations (using the Sentaurus TCAD tool suite by Synopsys®, Inc.) and corresponding analysis show that, as compared to conventional cells, the proposed cell design offers a 10 times reduction in intrinsic threshold voltage shift. That, according to the measured endurance characteristics of cells fabricated in this work, translates to an improvement of over 200 times in program/erase endurance. In a nutshell, the proposed cell design offers superior reliability and endurance as compared to conventional NAND Flash memory cells.
NoteIncludes bibliographical references (p. 113-116)
Noteby Faraz Khan
CollectionGraduate School - New Brunswick Electronic Theses and Dissertations
RightsThe author owns the copyright to this work.